Documentos Técnicos
Especificações
Brand
MicrochipMemory Size
8kbit
Interface Type
Serial-SPI
Package Type
SOIC
Mounting Type
Surface Mount
Pin Count
8
Organisation
1K x 8 bit
Minimum Operating Supply Voltage
2.5 V
Maximum Operating Supply Voltage
5.5 V
Programming Voltage
2.5 → 5.5V
Number of Bits per Word
8bit
Dimensions
4.9 x 3.9 x 1.25mm
Number of Words
1K
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Data Retention
200yr
Maximum Random Access Time
230ns
Detalhes do produto
25AA080/25C080/25LC080 SPI Serial EEPROM
Microchips 25AA080/25C080/25LC080 family of devices are 8 Kbit SPI Serial EEPROMs available in a variety of package, temperature and power supply variants.
The Serial Peripheral Interface (SPI) is utilised to provide the required Clock Input (SCK), Data In (SI) and Data Out (SO) signals. The operation of these devices can be paused via a Hold pin (HOLD) which causes inputs to be ignored with the exception higher priority interrupts defined via the Chip Select (CS) pin.
EEPROM Serial Access - Microchip
P.O.A.
Each (In a Pack of 5) (Sem VAT)
5
P.O.A.
Each (In a Pack of 5) (Sem VAT)
5
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Documentos Técnicos
Especificações
Brand
MicrochipMemory Size
8kbit
Interface Type
Serial-SPI
Package Type
SOIC
Mounting Type
Surface Mount
Pin Count
8
Organisation
1K x 8 bit
Minimum Operating Supply Voltage
2.5 V
Maximum Operating Supply Voltage
5.5 V
Programming Voltage
2.5 → 5.5V
Number of Bits per Word
8bit
Dimensions
4.9 x 3.9 x 1.25mm
Number of Words
1K
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Data Retention
200yr
Maximum Random Access Time
230ns
Detalhes do produto
25AA080/25C080/25LC080 SPI Serial EEPROM
Microchips 25AA080/25C080/25LC080 family of devices are 8 Kbit SPI Serial EEPROMs available in a variety of package, temperature and power supply variants.
The Serial Peripheral Interface (SPI) is utilised to provide the required Clock Input (SCK), Data In (SI) and Data Out (SO) signals. The operation of these devices can be paused via a Hold pin (HOLD) which causes inputs to be ignored with the exception higher priority interrupts defined via the Chip Select (CS) pin.