Documentos Técnicos
Especificações
Brand
Renesas ElectronicsProduct Type
FIFO Memory
Organisation
512 x 9
Data Bus Width
9bit
Access Time
12ns
Mount Type
Surface
Minimum Supply Voltage
4.5V
Package Type
PDIP
Timing Type
Asynchronous
Pin Count
28
Maximum Supply Voltage
5.5V
Minimum Operating Temperature
-40°C
Bus Direction
Bi-Directional
Maximum Operating Temperature
85°C
Height
2.79mm
Length
34.3mm
Standards/Approvals
No
Width
7.62mm
Series
IDT7201LA
Number of Bits per Word
9
Supply Current
80mA
Automotive Standard
No
País de Origem
Thailand
Detalhes do produto
The Renesas Electronics FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a retransmit capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
Informações de estoque temporariamente indisponíveis.
R$ 231,67
R$ 231,67 Each (Sem VAT)
Padrão
1
R$ 231,67
R$ 231,67 Each (Sem VAT)
Informações de estoque temporariamente indisponíveis.
Padrão
1
| Quantidade | Preço unitário |
|---|---|
| 1 - 4 | R$ 231,67 |
| 5 - 9 | R$ 230,52 |
| 10 - 27 | R$ 221,22 |
| 28+ | R$ 218,99 |
Documentos Técnicos
Especificações
Brand
Renesas ElectronicsProduct Type
FIFO Memory
Organisation
512 x 9
Data Bus Width
9bit
Access Time
12ns
Mount Type
Surface
Minimum Supply Voltage
4.5V
Package Type
PDIP
Timing Type
Asynchronous
Pin Count
28
Maximum Supply Voltage
5.5V
Minimum Operating Temperature
-40°C
Bus Direction
Bi-Directional
Maximum Operating Temperature
85°C
Height
2.79mm
Length
34.3mm
Standards/Approvals
No
Width
7.62mm
Series
IDT7201LA
Number of Bits per Word
9
Supply Current
80mA
Automotive Standard
No
País de Origem
Thailand
Detalhes do produto
The Renesas Electronics FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a retransmit capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW. It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
